The tutorial cuts the learning curve down in several ways. It’s no wonder FPGAs have sent more than one beginner running for the hills. Now you’ve got a new type of device, a new language, an entirely new programming paradigm, and a complex IDE to learn all at once. Most modern programmable logic designs are created in a Hardware Description Language (HDL) such as VHDL or Verilog. Cheap Field Programmable Gate Arrays (FPGA) are plentiful, but can have intricate power requirements. They also can have a steep learning curve. Try the Wayback Machine.) Programmable logic devices are one of the most versatile hardware building blocks available to hackers. is making programmable logic design easy with an 8 part CPLD tutorial.
Software Development using HAL (There is a section on using timer device.The guys over at hackshed have been busy.Nios Timer, Nios II Timer (revised Oct 07).Once your hardware is configured, refer to the following documents for software/hardware development. For more information about the NiosII processor, refer to the following documents: NiosII reference manual, NiosII tutorial, and Debug Client tutorial.ĥ. At this point, your board should be configured with the specified NiosII processor. Click on the "programmer/configure" box in your chain1.cdf dialog box then click start (see the figure below). See the figure below for the location of this file.Ĥ. Select standard directory and then click on NiosII_stratix_1s10_standard.sof. In this directory, there are many configurations of the NiosII processors ranging from minimum (no caches, no debugging functionality) to fully loaded configurations (with instruction/data caches, hardware debugger, dynamic branch predictor, etc.). In this case, your path would be: c:\altera\71\nios2eds\examples\vhdl\niosII_stratix_1s10. For example, if your board is the Nios DK, your FPGA technology would likely be stratix_1s10. Go to c:\altera\71\nios2eds\examples\vhdl\ and then the corresponding FPGA technology for your board (check the board to identify the right FPGA technology). Then choose "Add File" from the chain.cdf* dialog box. Under tool -> programmer, set your programming hardware to usb-blaster.
Windows should now be able to install the correct driver for your programming hardware.ģ. C:\altera\71\quartus\drivers\usb-blaster). Do not connect to software update, instead direct the search path to the appropriate driver directory within the Quartus installation directory (e.g.
As part of the installation process, Windows will ask whether you want to connect to software update to locate the driver or you want to locate the driver manually.
Typically, your Windows OS is able to detect the connection as soon as you connect an Altera board to your PC through USB. This writing only focuses on the USB-Blaster, which is the most commonly used programming hardware. You now need to set up the corresponding device driver for you PC. In addition, you also need the Altera Univerisity Program IP Cores, which provide the additional support for components on the DE2 and Altera Debug Client, which provides the debugging environment for the NiosII processors.Ģ. Altera provides free license for the software. Download Quartus II Web Edition and Nios II Processors from Altera. Follow the steps listed below to configure your PC and download existing designs to the boards.ġ.
The content of this document applies to all available boards. As of this writing, our department has the following boards available: DE2, Nios Development Kit Stratix Ed., and UP 3. This document describes steps to download Altera Nios Processors on to development boards.
Nios II Tutorial Getting Start with Altera Development Board (DE2 or Nios Dev.